Discussion:
[PATCH 0/4] Allwinner A83T and Banana Pi M3 EMAC support
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Icenowy Zheng
2017-07-02 07:02:40 UTC
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This patchset is for Allwinner A83T and Banana Pi M3's Ethernet support.

The first and third patches are for A83T -- the first one enables the
sun8i_emac driver to be built on A83T, and the third one adds a stub
DT node.

The second patch is for all EMACs supported by sun8i_emac, which sets
the TX/RX delay. The TX delay is necessary on BPi M3 board for Ethernet
to behave properly.

The fourth patch is for BPi M3, including the DT part and the defconfig part.

With them enabled, we are now possible to use the Ethernet on BPi M3.
(I think PXE is possible, although my router doesn't support BOOTP and
I only tested pinging the router with fixed IP.)

Icenowy Zheng (4):
sun8i_emac: disable build of EPHY clock code on non-H3/H5 platforms
sun8i_emac: add support for setting EMAC TX/RX delay
sunxi: add stub EMAC device node in A83T device tree
sunxi: enable EMAC for Banana Pi M3 board

arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts | 13 ++++++++++++
arch/arm/dts/sun8i-a83t.dtsi | 25 ++++++++++++++++++++++
configs/Sinovoip_BPI_M3_defconfig | 1 +
drivers/net/sun8i_emac.c | 33 +++++++++++++++++++++++++++--
4 files changed, 70 insertions(+), 2 deletions(-)
--
2.13.0
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Icenowy Zheng
2017-07-02 07:02:41 UTC
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Sometimes the EPHY clock macros are not defined for non-H3/H5 platforms
(e.g. A83T), which makes the driver to fail to be built.

Only build the EPHY clock code when the SoC is H3/H5 by wrap them into
an #ifdef.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
drivers/net/sun8i_emac.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 09bbb2cdb5..c071f5d3c3 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -604,6 +604,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;

+#if defined(CONFIG_MACH_SUNXI_H3_H5)
if (priv->use_internal_phy) {
/* Set clock gating for ephy */
setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
@@ -611,6 +612,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
/* Deassert EPHY */
setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
}
+#endif

/* Set clock gating for emac */
setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
--
2.13.0
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Icenowy Zheng
2017-07-02 07:02:42 UTC
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Some boards have the EMAC TX/RX lanes wired with a different length with
the clock lane, which can be workarounded by setting a TX/RX delay in
the EMAC.

This kind of delays are already defined in the newest device tree
binding of dwmac-sun8i, which has already entered linux-next.

Add support for setting these delays.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
drivers/net/sun8i_emac.c | 31 +++++++++++++++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index c071f5d3c3..4ba65c8a06 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -60,6 +60,10 @@
#define SC_ETCS_MASK GENMASK(1, 0)
#define SC_ETCS_EXT_GMII 0x1
#define SC_ETCS_INT_GMII 0x2
+#define SC_ETXDC_MASK GENMASK(12, 10)
+#define SC_ETXDC_OFFSET 10
+#define SC_ERXDC_MASK GENMASK(9, 5)
+#define SC_ERXDC_OFFSET 5

#define CONFIG_MDIO_TIMEOUT (3 * CONFIG_SYS_HZ)

@@ -140,6 +144,8 @@ struct emac_eth_dev {
struct sun8i_eth_pdata {
struct eth_pdata eth_pdata;
u32 reset_delays[3];
+ int tx_delay_ps;
+ int rx_delay_ps;
};


@@ -273,7 +279,8 @@ static int sun8i_emac_set_syscon_ephy(struct emac_eth_dev *priv, u32 *reg)
return 0;
}

-static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
+static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
+ struct emac_eth_dev *priv)
{
int ret;
u32 reg;
@@ -309,6 +316,14 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
return -EINVAL;
}

+ if (pdata->tx_delay_ps)
+ reg |= ((pdata->tx_delay_ps / 100) << SC_ETXDC_OFFSET)
+ & SC_ETXDC_MASK;
+
+ if (pdata->rx_delay_ps)
+ reg |= ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET)
+ & SC_ERXDC_MASK;
+
writel(reg, priv->sysctl_reg);

return 0;
@@ -748,7 +763,7 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
priv->mac_reg = (void *)pdata->iobase;

sun8i_emac_board_setup(priv);
- sun8i_emac_set_syscon(priv);
+ sun8i_emac_set_syscon((struct sun8i_eth_pdata *)pdata, priv);

sun8i_mdio_init(dev->name, dev);
priv->bus = miiphy_get_dev_by_name(dev->name);
@@ -821,6 +836,18 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
if (!priv->use_internal_phy)
parse_phy_pins(dev);

+ sun8i_pdata->tx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
+ "allwinner,tx-delay-ps", 0);
+ if (sun8i_pdata->tx_delay_ps < 0 || sun8i_pdata->tx_delay_ps > 700)
+ printf("%s: Invalid TX delay value %d\n", __func__,
+ sun8i_pdata->tx_delay_ps);
+
+ sun8i_pdata->rx_delay_ps = fdtdec_get_int(gd->fdt_blob, node,
+ "allwinner,rx-delay-ps", 0);
+ if (sun8i_pdata->rx_delay_ps < 0 || sun8i_pdata->rx_delay_ps > 3100)
+ printf("%s: Invalid RX delay value %d\n", __func__,
+ sun8i_pdata->rx_delay_ps);
+
#ifdef CONFIG_DM_GPIO
if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
"snps,reset-active-low"))
--
2.13.0
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Icenowy Zheng
2017-07-02 07:02:43 UTC
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The Allwinner A83T SoC has an EMAC which is already supported by
sun8i_emac driver in U-Boot now.

Add a stub device node for it.

The device node cannot work for Linux, because it now lacks the proper
clock definition; however, it can satisfy sun8i_emac driver in U-Boot.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
arch/arm/dts/sun8i-a83t.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)

diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi
index 0fe73e173f..9aac3a7929 100644
--- a/arch/arm/dts/sun8i-a83t.dtsi
+++ b/arch/arm/dts/sun8i-a83t.dtsi
@@ -52,6 +52,10 @@
/ {
interrupt-parent = <&gic>;

+ aliases {
+ ethernet0 = &emac;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -166,6 +170,17 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;

+ emac_rgmii_pins: emac-rgmii {
+ allwinner,pins = "PD2", "PD3", "PD4", "PD5",
+ "PD6", "PD7", "PD11",
+ "PD12", "PD13", "PD14",
+ "PD18", "PD19", "PD21",
+ "PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
mmc0_pins_a: ***@0 {
allwinner,pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
@@ -214,6 +229,16 @@
status = "disabled";
};

+ emac: ***@1c30000 {
+ compatible = "allwinner,sun8i-a83t-emac";
+ reg = <0x01c30000 0x104>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
gic: interrupt-***@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
--
2.13.0
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Maxime Ripard
2017-07-03 06:52:00 UTC
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Post by Icenowy Zheng
The Allwinner A83T SoC has an EMAC which is already supported by
sun8i_emac driver in U-Boot now.
Add a stub device node for it.
The device node cannot work for Linux, because it now lacks the proper
clock definition; however, it can satisfy sun8i_emac driver in U-Boot.
Uh?

There is clock support in Linux.

Maxime
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http://free-electrons.com
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Icenowy Zheng
2017-07-03 06:54:17 UTC
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Post by Icenowy Zheng
Post by Icenowy Zheng
The Allwinner A83T SoC has an EMAC which is already supported by
sun8i_emac driver in U-Boot now.
Add a stub device node for it.
The device node cannot work for Linux, because it now lacks the
proper
Post by Icenowy Zheng
clock definition; however, it can satisfy sun8i_emac driver in
U-Boot.
Uh?
There is clock support in Linux.
But adding it will largely change U-Boot DT.

I may do it then, in a sync between Linux and U-Boot DT.
Post by Icenowy Zheng
Maxime
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Maxime Ripard
2017-07-03 20:46:17 UTC
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Post by Icenowy Zheng
Post by Icenowy Zheng
Post by Icenowy Zheng
The Allwinner A83T SoC has an EMAC which is already supported by
sun8i_emac driver in U-Boot now.
Add a stub device node for it.
The device node cannot work for Linux, because it now lacks the
proper
Post by Icenowy Zheng
clock definition; however, it can satisfy sun8i_emac driver in
U-Boot.
Uh?
There is clock support in Linux.
But adding it will largely change U-Boot DT.
I may do it then, in a sync between Linux and U-Boot DT.
Why not send the patches to Linux, and just sync the DT later?

Maxime
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Embedded Linux and Kernel engineering
http://free-electrons.com
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Icenowy Zheng
2017-07-04 00:07:42 UTC
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Post by Maxime Ripard
于 2017年7月3日 GMT+08:00 下午2:52:00, Maxime Ripard
Post by Icenowy Zheng
Post by Icenowy Zheng
The Allwinner A83T SoC has an EMAC which is already supported by
sun8i_emac driver in U-Boot now.
Add a stub device node for it.
The device node cannot work for Linux, because it now lacks the
proper
Post by Icenowy Zheng
clock definition; however, it can satisfy sun8i_emac driver in
U-Boot.
Uh?
There is clock support in Linux.
But adding it will largely change U-Boot DT.
I may do it then, in a sync between Linux and U-Boot DT.
Why not send the patches to Linux, and just sync the DT later?
The U-Boot DT have already changed from the Linux one for a lot.

Maybe I need to use the DT of at least 4.14...
Post by Maxime Ripard
Maxime
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Maxime Ripard
2017-07-04 21:21:31 UTC
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Post by Icenowy Zheng
Post by Maxime Ripard
于 2017幎7月3日 GMT+08:00 䞋午2:52:00, Maxime Ripard
Post by Icenowy Zheng
Post by Icenowy Zheng
The Allwinner A83T SoC has an EMAC which is already supported by
sun8i_emac driver in U-Boot now.
Add a stub device node for it.
The device node cannot work for Linux, because it now lacks the
proper
Post by Icenowy Zheng
clock definition; however, it can satisfy sun8i_emac driver in
U-Boot.
Uh?
There is clock support in Linux.
But adding it will largely change U-Boot DT.
I may do it then, in a sync between Linux and U-Boot DT.
Why not send the patches to Linux, and just sync the DT later?
The U-Boot DT have already changed from the Linux one for a lot.
Yes, and we had a good reason, the ethernet binding wasn't there
yet. Fortunately, this isn't the case anymore, so there's no reason to
diverge anymore.
Post by Icenowy Zheng
Maybe I need to use the DT of at least 4.14...
Merging something that is in linux-next is definitely ok.

Maxime
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Andre Przywara
2017-07-06 10:09:18 UTC
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Hi,
Post by Icenowy Zheng
The Allwinner A83T SoC has an EMAC which is already supported by
sun8i_emac driver in U-Boot now.
Add a stub device node for it.
The device node cannot work for Linux, because it now lacks the proper
clock definition; however, it can satisfy sun8i_emac driver in U-Boot.
if you rebase your series on top of mine [1], you should be able to
directly use mainline Linux DT nodes, namely ...
Post by Icenowy Zheng
---
arch/arm/dts/sun8i-a83t.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi
index 0fe73e173f..9aac3a7929 100644
--- a/arch/arm/dts/sun8i-a83t.dtsi
+++ b/arch/arm/dts/sun8i-a83t.dtsi
@@ -52,6 +52,10 @@
/ {
interrupt-parent = <&gic>;
+ aliases {
+ ethernet0 = &emac;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -166,6 +170,17 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
+ emac_rgmii_pins: emac-rgmii {
+ allwinner,pins = "PD2", "PD3", "PD4", "PD5",
+ "PD6", "PD7", "PD11",
+ "PD12", "PD13", "PD14",
+ "PD18", "PD19", "PD21",
+ "PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
... using the new generic pinctrl bindings here ...
Post by Icenowy Zheng
+ };
+
allwinner,pins = "PF0", "PF1", "PF2",
"PF3", "PF4", "PF5";
@@ -214,6 +229,16 @@
status = "disabled";
};
+ compatible = "allwinner,sun8i-a83t-emac";
+ reg = <0x01c30000 0x104>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
... and using the new binding scheme here, with a "syscon" property, for
instance.

Also the Linux binding requires an mdio child node, which should be
introduced here.

Cheers,
Andre.
Post by Icenowy Zheng
+ };
+
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
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Icenowy Zheng
2017-07-02 07:02:44 UTC
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Banana Pi M3 board comes with the A83T EMAC connected to a Realtek
RTL8211E PHY, with a TX delay of 600ps.

Add the necessary DT parts and enable sun8i_emac in the defconfig.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts | 13 +++++++++++++
configs/Sinovoip_BPI_M3_defconfig | 1 +
2 files changed, 14 insertions(+)

diff --git a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts b/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
index dfc16a0272..8e74227ad6 100644
--- a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
+++ b/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
@@ -61,6 +61,19 @@
status = "okay";
};

+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ allwinner,tx-delay-ps = <600>;
+ status = "okay";
+
+ phy1: ethernet-***@1 {
+ reg = <1>;
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_b>;
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index 45eadcb443..ff068900a5 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -22,6 +22,7 @@ CONFIG_SPL=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DCDC5_VOLT=1200
CONFIG_AXP_DLDO3_VOLT=2500
CONFIG_AXP_SW_ON=y
--
2.13.0
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Andre Przywara
2017-07-06 10:13:05 UTC
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Hi,

when using the new binding support [1] (this time the link is for real
Post by Icenowy Zheng
Banana Pi M3 board comes with the A83T EMAC connected to a Realtek
RTL8211E PHY, with a TX delay of 600ps.
Add the necessary DT parts and enable sun8i_emac in the defconfig.
---
arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts | 13 +++++++++++++
configs/Sinovoip_BPI_M3_defconfig | 1 +
2 files changed, 14 insertions(+)
diff --git a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts b/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
index dfc16a0272..8e74227ad6 100644
--- a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
+++ b/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
@@ -61,6 +61,19 @@
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
This is called phy-handle in Linux.
Post by Icenowy Zheng
+ allwinner,tx-delay-ps = <600>;
+ status = "okay";
+
+ reg = <1>;
+ };
This should be a child of the mdio node.

Cheers,
Andre.

[1] https://lists.denx.de/pipermail/u-boot/2017-July/296929.html
Post by Icenowy Zheng
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_b>;
diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index 45eadcb443..ff068900a5 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -22,6 +22,7 @@ CONFIG_SPL=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DCDC5_VOLT=1200
CONFIG_AXP_DLDO3_VOLT=2500
CONFIG_AXP_SW_ON=y
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