Discussion:
[PATCH v2 0/2] ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 and mmc1 to dtsi
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Joonas Kylmälä
2018-02-07 20:48:03 UTC
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Hi,

This short patch series moves mmc0 and mmc1 pinctrl in H3 and H2+
boards' dts files to the dtsi file in order to make it easier to do
changes in the future to pinctrl attributes if required. This sort of
cleaning up of the dts files was discussed earlier in the email thread
with the subject "[linux-sunxi] [PATCH v2 6/8] ARM: dts: sun8i: a83t:
Move mmc1 pinctrl setting to dtsi file".

As this is my first patch submission I urge you to look through the
patches carefully. I have tested that after applying the patches the
Orange Pi Zero still boots and MMC0 works and also its detect pin. I
don't have any of the other devices to test this with.

These patches are prepared against the branch sunxi/dt-for-4.17.

Changes since v1:
- Remove pinctrl from CD pin as noted by Maxime Ripard.
- Move pinctrl to dtsi also from those new dts files that were
introduced after v1 patch.

Best regards,
Joonas Kylmälä

Joonas Kylmälä (2):
ARM: dts: sun8i: h3-h5: Move pinctrl of mmc0 from dts to dtsi
ARM: dts: sun8i: h3-h5: Move pinctrl of mmc1 from dts to dtsi

arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 4 ----
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 4 ----
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 4 ----
arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 2 --
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 2 --
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts | 4 ----
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 4 ----
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 4 ----
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 2 --
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 10 ++++------
13 files changed, 4 insertions(+), 42 deletions(-)
--
2.11.0
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Joonas Kylmälä
2018-02-07 20:48:04 UTC
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Most of the boards use the mmc0 pins and their attributes defined in
mmc0_pins_a. Let's default to those by moving the pinctrl attributes
to the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.

As a side effect this patch also removes the GPIO detect
pin (mmc0_cd_pin) from pinctrl. The GPIO detect pin is already
requested and configured by mmc_gpiod_request_cd() in
drivers/mmc/core/slot-gpio.c so pinctrl is not needed.

Signed-off-by: Joonas Kylmälä <***@iki.fi>
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 2 --
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 2 --
arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts | 2 --
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts | 2 --
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 2 --
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 8 ++------
11 files changed, 2 insertions(+), 26 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index 9a5017bb1440..f3b066ff63cb 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -112,8 +112,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 3a196a86a984..bea49ed89cc7 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -136,8 +136,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index 7824f0dbf022..9fc07593e907 100644
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -115,8 +115,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
index d9dc14fe2aa3..d0d41eb86cb4 100644
--- a/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -150,8 +150,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <&reg_vcc_io>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
index 48563adc7430..07e2e6180792 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
@@ -80,8 +80,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
index e9af61394f5d..f110ee382239 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
@@ -96,8 +96,6 @@
&mmc0 {
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
status = "okay";
vmmc-supply = <&reg_vcc3v3>;
};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 629f76b85005..ac6f52f3fa62 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -132,8 +132,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
index 398f975b380d..82ab5b6b730b 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -106,8 +106,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 40941fef4ff3..c1a8cd93c463 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -106,8 +106,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
index c4769def8cd6..537227b85935 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
@@ -128,8 +128,6 @@
};

&mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 7a83b15225c7..3a0854a96a04 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -141,6 +141,8 @@
mmc0: ***@1c0f000 {
/* compatible and clocks are in per SoC .dtsi file */
reg = <0x01c0f000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>;
resets = <&ccu RST_BUS_MMC0>;
reset-names = "ahb";
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
@@ -356,12 +358,6 @@
bias-pull-up;
};

- mmc0_cd_pin: mmc0_cd_pin {
- pins = "PF6";
- function = "gpio_in";
- bias-pull-up;
- };
-
mmc1_pins_a: mmc1 {
pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";
--
2.11.0
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Joonas Kylmälä
2018-02-08 10:26:00 UTC
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Also, wouldn't the H5 boards need some change too?
Definitely. I was just looking for all the dts files in
arch/arm/boot/dts/ and didn't even realize there was also
arch/arm64/boot/dts/.

I will send soon a new version of the patchset!

Joonas
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Joonas Kylmälä
2018-02-07 20:48:05 UTC
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Most of the boards use the mmc1 pins and their attributes defined in
mmc1_pins_a. Let's default to that by moving the pinctrl attributes to
the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.

Signed-off-by: Joonas Kylmälä <***@iki.fi>
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 2 --
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 2 --
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 2 --
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 2 --
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts | 2 --
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 2 --
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 2 ++
9 files changed, 2 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index f3b066ff63cb..73978853bb4c 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -119,8 +119,6 @@
};

&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc_wifi>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index bea49ed89cc7..9c1bc472fb1c 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -143,8 +143,6 @@
};

&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index 9fc07593e907..870aabcbb2d8 100644
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -122,8 +122,6 @@
};

&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index a6e61915d648..07b51a2f14c6 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -101,8 +101,6 @@
};

&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
index 07e2e6180792..6246d3eff39d 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
@@ -87,8 +87,6 @@
};

&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index ac6f52f3fa62..7569bd05e249 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -139,8 +139,6 @@
};

&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
index 82ab5b6b730b..2e59fd296717 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
@@ -113,8 +113,6 @@
};

&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index a10281b455f5..71fb73208939 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -59,8 +59,6 @@
};

&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 3a0854a96a04..b4a4b3cb6c4e 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -154,6 +154,8 @@
mmc1: ***@1c10000 {
/* compatible and clocks are in per SoC .dtsi file */
reg = <0x01c10000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
resets = <&ccu RST_BUS_MMC1>;
reset-names = "ahb";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
--
2.11.0
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