Discussion:
[PATCH 1/7] sunxi: binman: Fix U-Boot binary size check
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Samuel Holland
2018-01-23 22:18:13 UTC
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If raw mode is disabled, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is not
defined, which breaks compiling the device trees. Only enable the size
check when it actually matters--that is, when MMC raw mode is enabled.

Signed-off-by: Samuel Holland <***@sholland.org>
---
arch/arm/dts/sunxi-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 72e95afd78..996f391030 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -17,7 +17,7 @@
filename = "spl/sunxi-spl.bin";
};
u-boot-img {
-#ifdef CONFIG_MMC
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
size = <UBOOT_MMC_MAX_SIZE>;
#endif
pos = <CONFIG_SPL_PAD_TO>;
--
2.13.6
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Samuel Holland
2018-01-23 22:18:15 UTC
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These nodes were previously in an unused file specific to the Pine64.
Move them to the base SoC device tree for use by other boards. Require
individual boards to enable the emac and provide a pin configuration.

Signed-off-by: Samuel Holland <***@sholland.org>
---
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 50 -------------------------
arch/arm/dts/sun50i-a64.dtsi | 28 ++++++++++++++
2 files changed, 28 insertions(+), 50 deletions(-)
delete mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi

diff --git a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
deleted file mode 100644
index 9c61beac01..0000000000
--- a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
+++ /dev/null
@@ -1,50 +0,0 @@
-/ {
- aliases {
- ethernet0 = &emac;
- };
-
- soc {
- emac: ***@01c30000 {
- compatible = "allwinner,sun50i-a64-emac";
- reg = <0x01c30000 0x2000>, <0x01c00030 0x4>;
- reg-names = "emac", "syscon";
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&ccu RST_BUS_EMAC>;
- reset-names = "ahb";
- clocks = <&ccu CLK_BUS_EMAC>;
- clock-names = "ahb";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
- phy = <&phy1>;
- status = "okay";
-
- phy1: ethernet-***@1 {
- reg = <1>;
- };
- };
- };
-};
-
-&pio {
- rmii_pins: rmii_pins {
- allwinner,pins = "PD10", "PD11", "PD13", "PD14",
- "PD17", "PD18", "PD19", "PD20",
- "PD22", "PD23";
- allwinner,function = "emac";
- allwinner,drive = <3>;
- allwinner,pull = <0>;
- };
-
- rgmii_pins: rgmii_pins {
- allwinner,pins = "PD8", "PD9", "PD10", "PD11",
- "PD12", "PD13", "PD15",
- "PD16", "PD17", "PD18", "PD19",
- "PD20", "PD21", "PD22", "PD23";
- allwinner,function = "emac";
- allwinner,drive = <3>;
- allwinner,pull = <0>;
- };
-};
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 02061cc608..c686707cf5 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -51,6 +51,10 @@
#address-cells = <1>;
#size-cells = <1>;

+ aliases {
+ ethernet0 = &emac;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -267,6 +271,16 @@
interrupt-controller;
#interrupt-cells = <3>;

+ emac_rgmii_pins: emac_rgmii_pins {
+ allwinner,pins = "PD8", "PD9", "PD10", "PD11",
+ "PD12", "PD13", "PD15",
+ "PD16", "PD17", "PD18", "PD19",
+ "PD20", "PD21", "PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <3>;
+ allwinner,pull = <0>;
+ };
+
i2c1_pins: i2c1_pins {
pins = "PH2", "PH3";
function = "i2c1";
@@ -401,6 +415,20 @@
#size-cells = <0>;
};

+ emac: ***@01c30000 {
+ compatible = "allwinner,sun50i-a64-emac";
+ reg = <0x01c30000 0x2000>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "ahb";
+ clocks = <&ccu CLK_BUS_EMAC>;
+ clock-names = "ahb";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
gic: interrupt-***@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,
--
2.13.6
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Maxime Ripard
2018-01-24 08:37:28 UTC
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Post by Samuel Holland
These nodes were previously in an unused file specific to the Pine64.
Move them to the base SoC device tree for use by other boards. Require
individual boards to enable the emac and provide a pin configuration.
---
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 50 -------------------------
arch/arm/dts/sun50i-a64.dtsi | 28 ++++++++++++++
2 files changed, 28 insertions(+), 50 deletions(-)
delete mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
On that note, it seems like it would be a good idea to re-sync this
with mainline Linux now that emac bindings exist in-tree [1] and these
are generally becoming standard. Thoughts?
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi#n508
Agreed.

Maxime
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André Przywara
2018-01-25 00:21:07 UTC
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Post by Samuel Holland
These nodes were previously in an unused file specific to the Pine64.
Move them to the base SoC device tree for use by other boards. Require
individual boards to enable the emac and provide a pin configuration.
---
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 50 -------------------------
arch/arm/dts/sun50i-a64.dtsi | 28 ++++++++++++++
2 files changed, 28 insertions(+), 50 deletions(-)
delete mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
On that note, it seems like it would be a good idea to re-sync this
with mainline Linux now that emac bindings exist in-tree [1] and these
are generally becoming standard. Thoughts?
Sure. The problem with that is that the Ethernet nodes are no longer
compatible with what the U-Boot driver understands. Solutions are:
- Keep the EMAC nodes - in "old" U-Boot style - in a *-u-boot.dtsi
override. Easy enough, but bad idea.
- Teach the U-Boot EMAC driver to cope with the new bindings. I sent
patches for that a while ago [2]. Problem is that people didn't like the
"handish" way of parsing the pinctrl properties - instead opting for a
proper DM pinctrl driver for sunxi. Sounds reasonable - but is a quite a
chunk of work. This was on the list before - but IMHO a bit over the top
by copying the Linux driver.

I was wondering if we could just go with the easy pinctrl solution (as
in [2], based on what we currently have in the EMAC driver). We could
switch anytime to a proper DM pinctrl driver - which is on my list, but
not very high on it. I have some ideas on how to make this small and
simple, as we don't need the fully glory and bloat of the Linux driver.

If people are OK with this, I can post a rebased version of [2]. We can
then just copy the mainline DTs for A64 into U-Boot.
And leave the DM pinctrl driver for another time.

Cheers,
Andre.

[2] https://lists.denx.de/pipermail/u-boot/2017-July/296923.html
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi#n508
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Maxime Ripard
2018-01-25 07:46:57 UTC
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Post by André Przywara
Post by Samuel Holland
These nodes were previously in an unused file specific to the Pine64.
Move them to the base SoC device tree for use by other boards. Require
individual boards to enable the emac and provide a pin configuration.
---
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 50 -------------------------
arch/arm/dts/sun50i-a64.dtsi | 28 ++++++++++++++
2 files changed, 28 insertions(+), 50 deletions(-)
delete mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
On that note, it seems like it would be a good idea to re-sync this
with mainline Linux now that emac bindings exist in-tree [1] and these
are generally becoming standard. Thoughts?
Sure. The problem with that is that the Ethernet nodes are no longer
- Keep the EMAC nodes - in "old" U-Boot style - in a *-u-boot.dtsi
override. Easy enough, but bad idea.
- Teach the U-Boot EMAC driver to cope with the new bindings. I sent
patches for that a while ago [2]. Problem is that people didn't like the
"handish" way of parsing the pinctrl properties - instead opting for a
proper DM pinctrl driver for sunxi. Sounds reasonable - but is a quite a
chunk of work. This was on the list before - but IMHO a bit over the top
by copying the Linux driver.
I was wondering if we could just go with the easy pinctrl solution (as
in [2], based on what we currently have in the EMAC driver). We could
switch anytime to a proper DM pinctrl driver - which is on my list, but
not very high on it. I have some ideas on how to make this small and
simple, as we don't need the fully glory and bloat of the Linux driver.
If people are OK with this, I can post a rebased version of [2]. We can
then just copy the mainline DTs for A64 into U-Boot.
And leave the DM pinctrl driver for another time.
That's what I was about to suggest. The pinctrl discussion is pretty
much orthogonal, and we'll have to convert a whole bunch of drivers
anyway when that happens, so it's not a big deal to add a new driver
that doesn't rely on pinctrl at the moment.

Maxime
--
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Embedded Linux and Kernel engineering
http://free-electrons.com
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Andre Przywara
2018-01-25 09:44:11 UTC
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Hi,
Post by Maxime Ripard
Post by André Przywara
Post by Samuel Holland
These nodes were previously in an unused file specific to the Pine64.
Move them to the base SoC device tree for use by other boards. Require
individual boards to enable the emac and provide a pin configuration.
---
arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 50 -------------------------
arch/arm/dts/sun50i-a64.dtsi | 28 ++++++++++++++
2 files changed, 28 insertions(+), 50 deletions(-)
delete mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
On that note, it seems like it would be a good idea to re-sync this
with mainline Linux now that emac bindings exist in-tree [1] and these
are generally becoming standard. Thoughts?
Sure. The problem with that is that the Ethernet nodes are no longer
- Keep the EMAC nodes - in "old" U-Boot style - in a *-u-boot.dtsi
override. Easy enough, but bad idea.
- Teach the U-Boot EMAC driver to cope with the new bindings. I sent
patches for that a while ago [2]. Problem is that people didn't like the
"handish" way of parsing the pinctrl properties - instead opting for a
proper DM pinctrl driver for sunxi. Sounds reasonable - but is a quite a
chunk of work. This was on the list before - but IMHO a bit over the top
by copying the Linux driver.
I was wondering if we could just go with the easy pinctrl solution (as
in [2], based on what we currently have in the EMAC driver). We could
switch anytime to a proper DM pinctrl driver - which is on my list, but
not very high on it. I have some ideas on how to make this small and
simple, as we don't need the fully glory and bloat of the Linux driver.
If people are OK with this, I can post a rebased version of [2]. We can
then just copy the mainline DTs for A64 into U-Boot.
And leave the DM pinctrl driver for another time.
That's what I was about to suggest. The pinctrl discussion is pretty
much orthogonal, and we'll have to convert a whole bunch of drivers
anyway when that happens, so it's not a big deal to add a new driver
that doesn't rely on pinctrl at the moment.
Thanks, I totally agree.

I will post something after I have tested it later tonight.
If you don't mind, I will include the mainline H3/H5 DTs as well (in a
separate patch), as they suffer from the same EMAC problem and are stuck
at a copy from an ancient kernel (if at all) at the moment.

Cheers,
Andre.
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Samuel Holland
2018-01-23 22:18:16 UTC
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Enable Ethernet support in the device tree and add the necessary MACPWR
configuration. Also fix spacing in USB device tree nodes and add the
relevant configuration options.

Signed-off-by: Samuel Holland <***@sholland.org>
---
arch/arm/dts/sun50i-a64-orangepi-win.dts | 18 +++++++++++++++---
configs/orangepi_win_defconfig | 5 ++++-
2 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts b/arch/arm/dts/sun50i-a64-orangepi-win.dts
index cf76c35237..41bad328f0 100644
--- a/arch/arm/dts/sun50i-a64-orangepi-win.dts
+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
@@ -67,7 +67,19 @@
};

&ehci1 {
- status = "okay";
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ status = "okay";
+
+ phy1: ethernet-***@1 {
+ reg = <1>;
+ };
};

&mmc0 {
@@ -80,7 +92,7 @@
};

&ohci1 {
- status = "okay";
+ status = "okay";
};

&uart0 {
@@ -90,5 +102,5 @@
};

&usbphy {
- status = "okay";
+ status = "okay";
};
diff --git a/configs/orangepi_win_defconfig b/configs/orangepi_win_defconfig
index f9c3d4acf9..670c1868b2 100644
--- a/configs/orangepi_win_defconfig
+++ b/configs/orangepi_win_defconfig
@@ -1,7 +1,10 @@
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_MACH_SUN50I=y
-CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_DRAM_ZQ=3881977
+CONFIG_MACPWR="PD14"
+CONFIG_USB0_ID_DET="PH9"
+CONFIG_USB1_VBUS_PIN="PD7"
CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-orangepi-win"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL=y
--
2.13.6
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Samuel Holland
2018-01-23 22:18:14 UTC
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Move the CLK_USB_OHCI0/1 clocks to the OHCI nodes where they belong, and
make the format consistent with the H3/H5 nodes. While here, also remove
leading zeros from the USB nodes' unit addresses.

Signed-off-by: Samuel Holland <***@sholland.org>
---
arch/arm/dts/sun50i-a64.dtsi | 34 ++++++++++++++--------------------
1 file changed, 14 insertions(+), 20 deletions(-)

diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 65a344d9ce..02061cc608 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -171,7 +171,7 @@
#size-cells = <0>;
};

- usb_otg: ***@01c19000 {
+ usb_otg: ***@1c19000 {
compatible = "allwinner,sun8i-a33-musb";
reg = <0x01c19000 0x0400>;
clocks = <&ccu CLK_BUS_OTG>;
@@ -184,7 +184,7 @@
status = "disabled";
};

- usbphy: ***@01c19400 {
+ usbphy: ***@1c19400 {
compatible = "allwinner,sun50i-a64-usb-phy";
reg = <0x01c19400 0x14>,
<0x01c1a800 0x4>,
@@ -204,49 +204,43 @@
#phy-cells = <1>;
};

- ehci0: ***@01c1a000 {
+ ehci0: ***@1c1a000 {
compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
reg = <0x01c1a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI0>,
- <&ccu CLK_BUS_EHCI0>,
- <&ccu CLK_USB_OHCI0>;
- resets = <&ccu RST_BUS_OHCI0>,
- <&ccu RST_BUS_EHCI0>;
+ clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
+ resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
status = "disabled";
};

- ohci0: ***@01c1a400 {
+ ohci0: ***@1c1a400 {
compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
reg = <0x01c1a400 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI0>,
+ clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
- resets = <&ccu RST_BUS_OHCI0>;
+ resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
status = "disabled";
};

- ehci1: ***@01c1b000 {
+ ehci1: ***@1c1b000 {
compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
reg = <0x01c1b000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI1>,
- <&ccu CLK_BUS_EHCI1>,
- <&ccu CLK_USB_OHCI1>;
- resets = <&ccu RST_BUS_OHCI1>,
- <&ccu RST_BUS_EHCI1>;
+ clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>;
+ resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};

- ohci1: ***@01c1b400 {
+ ohci1: ***@1c1b400 {
compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
reg = <0x01c1b400 0x100>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_OHCI1>,
+ clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>,
<&ccu CLK_USB_OHCI1>;
- resets = <&ccu RST_BUS_OHCI1>;
+ resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
--
2.13.6
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Maxime Ripard
2018-01-24 08:42:20 UTC
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Post by Samuel Holland
Move the CLK_USB_OHCI0/1 clocks to the OHCI nodes where they belong, and
make the format consistent with the H3/H5 nodes. While here, also remove
leading zeros from the USB nodes' unit addresses.
I guess you just took the linux DTS?

You can just mention that, along with which version of the kernel you
used for that synchronization.

Thanks!
Maxime
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Samuel Holland
2018-01-24 13:06:37 UTC
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Post by Maxime Ripard
Post by Samuel Holland
Move the CLK_USB_OHCI0/1 clocks to the OHCI nodes where they belong, and
make the format consistent with the H3/H5 nodes. While here, also remove
leading zeros from the USB nodes' unit addresses.
I guess you just took the linux DTS?
No, actually the Linux DTS has the same issue with the clocks (the unit
addresses there have been fixed). Should I send a patch there first?
Post by Maxime Ripard
You can just mention that, along with which version of the kernel you
used for that synchronization.
And then once that's merged, send a patch for synchronization?
Post by Maxime Ripard
Thanks!
Maxime
Thanks,
Samuel
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Maxime Ripard
2018-01-25 08:49:30 UTC
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Post by Samuel Holland
Post by Maxime Ripard
Post by Samuel Holland
Move the CLK_USB_OHCI0/1 clocks to the OHCI nodes where they belong, and
make the format consistent with the H3/H5 nodes. While here, also remove
leading zeros from the USB nodes' unit addresses.
I guess you just took the linux DTS?
No, actually the Linux DTS has the same issue with the clocks (the
unit addresses there have been fixed). Should I send a patch there
first?
A patch fixing that has been merged in 4.15.
Post by Samuel Holland
Post by Maxime Ripard
You can just mention that, along with which version of the kernel you
used for that synchronization.
And then once that's merged, send a patch for synchronization?
So you're only left with that :)

Maxime
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Samuel Holland
2018-01-23 22:18:18 UTC
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The OrangePi PC 2 has three USB type A ports, with one connected to each
EHCI/OHCI controller. Enable the controllers for the other two ports.

Signed-off-by: Samuel Holland <***@sholland.org>
---
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index fd8cfc6ff3..dd0cb2dc50 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -76,6 +76,14 @@
status = "okay";
};

+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
@@ -105,6 +113,14 @@
status = "okay";
};

+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
--
2.13.6
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Samuel Holland
2018-01-23 22:18:17 UTC
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Sort nodes alphabetically, and remove the ethernet alias duplicated from
the SoC device tree.

Signed-off-by: Samuel Holland <***@sholland.org>
---
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 41 ++++++++++++++++-----------------
1 file changed, 20 insertions(+), 21 deletions(-)

diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index 780d59a096..fd8cfc6ff3 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -60,7 +60,6 @@

aliases {
serial0 = &uart0;
- ethernet0 = &emac;
};

soc {
@@ -73,6 +72,22 @@
};
};

+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ status = "okay";
+
+ phy1: ethernet-***@1 {
+ reg = <1>;
+ };
+};
+
&mmc0 {
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
@@ -86,32 +101,16 @@
status = "okay";
};

-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
- status = "okay";
-};
-
-&usbphy {
- status = "okay";
-};
-
&ohci1 {
status = "okay";
};

-&ehci1 {
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};

-&emac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_rgmii_pins>;
- phy-mode = "rgmii";
- phy = <&phy1>;
+&usbphy {
status = "okay";
-
- phy1: ethernet-***@1 {
- reg = <1>;
- };
};
--
2.13.6
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Samuel Holland
2018-01-23 22:18:19 UTC
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The Orange Pi Zero Plus is a single board computer based on the
Allwinner H5 SoC. It has 512MiB RAM, gigabit Ethernet, and one USB 2.0
port, with headers for two additional ports.

Signed-off-by: Samuel Holland <***@sholland.org>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts | 115 +++++++++++++++++++++++++
arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 1 +
board/sunxi/MAINTAINERS | 6 ++
configs/orangepi_zero_plus_defconfig | 18 ++++
5 files changed, 141 insertions(+)
create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
create mode 100644 configs/orangepi_zero_plus_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9540ba4313..67635662cb 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -356,6 +356,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
+ sun50i-h5-orangepi-zero-plus.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-bananapi-m64.dtb \
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
new file mode 100644
index 0000000000..bcdde8b3f2
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2017 Jagan Teki <***@openedev.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "OrangePi Zero Plus";
+ compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0x40000000 0x20000000>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ status = "okay";
+
+ phy1: ethernet-***@1 {
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ compatible = "allwinner,sun50i-h5-mmc",
+ "allwinner,sun50i-a64-mmc",
+ "allwinner,sun5i-a13-mmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
index 3f4baba310..e44e75733e 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2017 Jagan Teki <***@openedev.com>
+ * Copyright (C) 2017 Samuel Holland <***@sholland.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 362edffc42..7b165e4ba0 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -321,6 +321,12 @@ M: Icenowy Zheng <***@aosc.xyz>
S: Maintained
F: configs/orangepi_zero_defconfig

+ORANGEPI ZERO PLUS BOARD
+M: Samuel Holland <***@sholland.org>
+S: Maintained
+F: arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
+F: configs/orangepi_zero_plus_defconfig
+
ORANGEPI ZERO PLUS 2 BOARD
M: Jagan Teki <***@amarulasolutions.com>
S: Maintained
diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig
new file mode 100644
index 0000000000..49954bbe4f
--- /dev/null
+++ b/configs/orangepi_zero_plus_defconfig
@@ -0,0 +1,18 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN50I_H5=y
+CONFIG_DRAM_ZQ=3881977
+CONFIG_MACPWR="PD6"
+CONFIG_USB0_ID_DET="PG12"
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SPL_SPI_SUNXI=y
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
--
2.13.6
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Maxime Ripard
2018-01-24 08:45:54 UTC
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Post by Samuel Holland
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
index 3f4baba310..e44e75733e 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
@@ -1,5 +1,6 @@
/*
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
You haven't touched that file. I guess this was meant for the Orange
Pi Zero Plus and not the Plus2?

Maxime
--
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Embedded Linux and Kernel engineering
http://free-electrons.com
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Samuel Holland
2018-01-24 13:03:14 UTC
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Post by Maxime Ripard
Post by Samuel Holland
diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
index 3f4baba310..e44e75733e 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
@@ -1,5 +1,6 @@
/*
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
You haven't touched that file. I guess this was meant for the Orange
Pi Zero Plus and not the Plus2?
Yes, it was, sorry.
Post by Maxime Ripard
Maxime
Thanks,
Samuel
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Maxime Ripard
2018-01-24 08:38:33 UTC
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Hi!
Post by Samuel Holland
If raw mode is disabled, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is not
defined, which breaks compiling the device trees. Only enable the size
check when it actually matters--that is, when MMC raw mode is enabled.
---
arch/arm/dts/sunxi-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 72e95afd78..996f391030 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -17,7 +17,7 @@
filename = "spl/sunxi-spl.bin";
};
u-boot-img {
-#ifdef CONFIG_MMC
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Why don't you change for ENV_IS_IN_MMC like your commit log would
suggest?

Thanks!
Maxime
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Samuel Holland
2018-01-24 13:13:54 UTC
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Post by Maxime Ripard
Hi!
Post by Samuel Holland
If raw mode is disabled, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is not
defined, which breaks compiling the device trees. Only enable the size
check when it actually matters--that is, when MMC raw mode is enabled.
---
arch/arm/dts/sunxi-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 72e95afd78..996f391030 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -17,7 +17,7 @@
filename = "spl/sunxi-spl.bin";
};
u-boot-img {
-#ifdef CONFIG_MMC
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Why don't you change for ENV_IS_IN_MMC like your commit log would
suggest?
Because if the environment is in MMC but U-Boot isn't (e.g. it's in SPI), or
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is in effect and the U-Boot image
is stored after the environment in MMC, then there's no chance of overlap and
the size doesn't matter.
Post by Maxime Ripard
Thanks!
Maxime
Thanks,
Samuel
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Maxime Ripard
2018-01-25 15:27:59 UTC
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Post by Samuel Holland
Post by Maxime Ripard
Hi!
Post by Samuel Holland
If raw mode is disabled, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is not
defined, which breaks compiling the device trees. Only enable the size
check when it actually matters--that is, when MMC raw mode is enabled.
---
arch/arm/dts/sunxi-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 72e95afd78..996f391030 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -17,7 +17,7 @@
filename = "spl/sunxi-spl.bin";
};
u-boot-img {
-#ifdef CONFIG_MMC
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Why don't you change for ENV_IS_IN_MMC like your commit log would
suggest?
Because if the environment is in MMC but U-Boot isn't (e.g. it's in SPI), or
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is in effect and the U-Boot image
is stored after the environment in MMC, then there's no chance of overlap and
the size doesn't matter.
Ah, right. Can you put that in your commit log?

Thanks!
Maxime
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Samuel Holland
2018-01-25 15:30:05 UTC
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Post by Maxime Ripard
Post by Samuel Holland
Post by Maxime Ripard
Hi!
Post by Samuel Holland
If raw mode is disabled, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR is not
defined, which breaks compiling the device trees. Only enable the size
check when it actually matters--that is, when MMC raw mode is enabled.
---
arch/arm/dts/sunxi-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index 72e95afd78..996f391030 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/dts/sunxi-u-boot.dtsi
@@ -17,7 +17,7 @@
filename = "spl/sunxi-spl.bin";
};
u-boot-img {
-#ifdef CONFIG_MMC
+#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Why don't you change for ENV_IS_IN_MMC like your commit log would
suggest?
Because if the environment is in MMC but U-Boot isn't (e.g. it's in SPI), or
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is in effect and the U-Boot image
is stored after the environment in MMC, then there's no chance of overlap and
the size doesn't matter.
Ah, right. Can you put that in your commit log?
Sure, I'll do that for v2.
Post by Maxime Ripard
Thanks!
Maxime
Thanks,
Samuel
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