[linux-sunxi] [PATCH 0/7] Allwinner A64 DE2 CCU support with dedicated DE2 bus driver

[Icenowy Zheng]

This patchset tries to implement the Allwinner A64 DE2 as a bus driver,
in order to model the fact that the SRAM claim controls the access to
the whole DE2 memory space.

PATCH 1 and PATCH 4 are for the CCU part.

PATCH 2 is the device tree binding for the A64 DE2 bus, and PATCH 3
implements the bus driver.

PATCH 5 is a modified version of A64 DE2 CCU patch, which uses the A64
DE2 bus.

PATCH 6 and 7 are just the simplefb patches for A64.

Icenowy Zheng (7):
dt-bindings: add compatible string for the A64 DE2 CCU
dt-bindings: add binding for the Allwinner A64 DE2 bus
bus: add bus driver for accessing Allwinner A64 DE2
clk: sunxi-ng: add A64 compatible string
arm64: allwinner: a64: add DE2 CCU related device tree nodes
arm64: allwinner: a64: add simplefb for A64 SoC
arm64: allwinner: a64: add HDMI regulator to all DTs' simplefb_hdmi

.../devicetree/bindings/bus/sun50i-de2-bus.txt | 37 ++++++++++++
.../devicetree/bindings/clock/sun8i-de2.txt | 1 +
.../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 4 ++
.../boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 4 ++
.../boot/dts/allwinner/sun50i-a64-olinuxino.dts | 4 ++
.../boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 4 ++
.../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 4 ++
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 4 ++
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 68 ++++++++++++++++++++++
drivers/bus/Kconfig | 10 ++++
drivers/bus/Makefile | 1 +
drivers/bus/sun50i-de2.c | 49 ++++++++++++++++
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 11 ++--
13 files changed, 194 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt
create mode 100644 drivers/bus/sun50i-de2.c

[Icenowy Zheng]

The Allwinner A64 SoC has a DE2 CCU like the one in the DE2 of Allwinner
H5 SoC.

Add a compatible string for it.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
Documentation/devicetree/bindings/clock/sun8i-de2.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/sun8i-de2.txt b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
index f2fa87c4765c..e94582e8b8a9 100644
--- a/Documentation/devicetree/bindings/clock/sun8i-de2.txt
+++ b/Documentation/devicetree/bindings/clock/sun8i-de2.txt
@@ -6,6 +6,7 @@ Required properties :
- "allwinner,sun8i-a83t-de2-clk"
- "allwinner,sun8i-h3-de2-clk"
- "allwinner,sun8i-v3s-de2-clk"
+ - "allwinner,sun50i-a64-de2-clk"
- "allwinner,sun50i-h5-de2-clk"

- reg: Must contain the registers base address and length

[Rob Herring]

Post by Icenowy Zheng
The Allwinner A64 SoC has a DE2 CCU like the one in the DE2 of Allwinner
H5 SoC.
Add a compatible string for it.
---
Documentation/devicetree/bindings/clock/sun8i-de2.txt | 1 +
1 file changed, 1 insertion(+)

Reviewed-by: Rob Herring <***@kernel.org>

[Icenowy Zheng]

All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64 SoC to
be claimed, otherwise the whole DE2 space is inaccessible.

Add a device tree binding of the DE2 part as a sub-bus.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
.../devicetree/bindings/bus/sun50i-de2-bus.txt | 37 ++++++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt

diff --git a/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt b/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt
new file mode 100644
index 000000000000..87dfb33fb3be
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt
@@ -0,0 +1,37 @@
+Device tree bindings for Allwinner A64 DE2 bus
+
+The Allwinner A64 DE2 is on a special bus, which needs a SRAM region (SRAM C)
+to be claimed for enabling the access.
+
+Required properties:
+
+ - compatible: Should contain "allwinner,sun50i-a64-de2"
+ - reg: A resource specifier for the register space
+ - #address-cells: Must be set to 1
+ - #size-cells: Must be set to 1
+ - ranges: Must be set up to map the address space inside the
+ DE2, for the sub-blocks of DE2.
+ - allwinner,sram: the SRAM that needs to be claimed
+
+Example:
+
+ ***@1000000 {
+ compatible = "allwinner,sun50i-a64-de2";
+ reg = <0x1000000 0x400000>;
+ allwinner,sram = <&de2_sram 1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1000000 0x400000>;
+
+ display_clocks: ***@0 {
+ compatible = "allwinner,sun50i-a64-de2-clk";
+ reg = <0x0 0x100000>;
+ clocks = <&ccu CLK_DE>,
+ <&ccu CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = <&ccu RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+ };

[Icenowy Zheng]

Post by Icenowy Zheng
All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64 SoC

to

Post by Icenowy Zheng
be claimed, otherwise the whole DE2 space is inaccessible.
Add a device tree binding of the DE2 part as a sub-bus.

Where did you get the info that it was a bus?

There's no direct evidence, just some guess.

The DE2 is a whole part that is just allocated a memory
space at the user manual, and the SRAM controls the
access to all modules in the DE2.

So it might be a bus.

Implement it as a bus is a clear representation on A64.

Maxime

[Jernej Škrabec]

Hi all,

Post by Icenowy Zheng

Post by Icenowy Zheng
All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64 SoC

to

Post by Icenowy Zheng
be claimed, otherwise the whole DE2 space is inaccessible.
Add a device tree binding of the DE2 part as a sub-bus.

Where did you get the info that it was a bus?

There's no direct evidence, just some guess.
The DE2 is a whole part that is just allocated a memory
space at the user manual, and the SRAM controls the
access to all modules in the DE2.
So it might be a bus.
Implement it as a bus is a clear representation on A64.

Since there is already syscon for same mmio region, we migh as well use it
when loading ccu-sun8i-de2 driver on A64.

Other options, like SRAM driver or bus driver, might better represent HW, but
then we would have two DT nodes covering same mmio region, which I think is
not really acceptable.

Any suggestions?

BTW, H6 has same design in this regard.

Best regards,
Jernej

[Icenowy Zheng]

Post by Jernej Å krabec
Hi all,

于 2018年3月21日 GMT+08:00 上午2:46:46, Maxime Ripard

Post by Icenowy Zheng
All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64

SoC

to

Post by Icenowy Zheng
be claimed, otherwise the whole DE2 space is inaccessible.
Add a device tree binding of the DE2 part as a sub-bus.

Where did you get the info that it was a bus?

There's no direct evidence, just some guess.
The DE2 is a whole part that is just allocated a memory
space at the user manual, and the SRAM controls the
access to all modules in the DE2.
So it might be a bus.
Implement it as a bus is a clear representation on A64.

Since there is already syscon for same mmio region, we migh as well use it
when loading ccu-sun8i-de2 driver on A64.
Other options, like SRAM driver or bus driver, might better represent HW, but

I think the device tree should properly represent the HW,
it's a basic requirment.

Post by Jernej Å krabec
then we would have two DT nodes covering same mmio region, which I think is
not really acceptable.

It's acceptable, and DE2 is not the only user of SRAM controller so far.

VE will also need a SRAM region to be claimed.

Post by Jernej Å krabec
Any suggestions?
BTW, H6 has same design in this regard.
Best regards,
Jernej

[Rob Herring]

Post by Icenowy Zheng

Post by Jernej Å krabec
Hi all,

于 2018年3月21日 GMT+08:00 上午2:46:46, Maxime Ripard

Post by Icenowy Zheng
All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64

SoC

to

Post by Icenowy Zheng
be claimed, otherwise the whole DE2 space is inaccessible.
Add a device tree binding of the DE2 part as a sub-bus.

Where did you get the info that it was a bus?

There's no direct evidence, just some guess.
The DE2 is a whole part that is just allocated a memory
space at the user manual, and the SRAM controls the
access to all modules in the DE2.
So it might be a bus.
Implement it as a bus is a clear representation on A64.

Since there is already syscon for same mmio region, we migh as well use it
when loading ccu-sun8i-de2 driver on A64.
Other options, like SRAM driver or bus driver, might better represent HW, but

I think the device tree should properly represent the HW,
it's a basic requirment.

Post by Jernej Å krabec
then we would have two DT nodes covering same mmio region, which I think is
not really acceptable.

It's acceptable, and DE2 is not the only user of SRAM controller so far.

No, it's not acceptable. Don't create overlapping mmio regions in DT.

Post by Icenowy Zheng
VE will also need a SRAM region to be claimed.

Post by Jernej Å krabec
Any suggestions?
BTW, H6 has same design in this regard.
Best regards,
Jernej

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[Icenowy Zheng]

Post by Icenowy Zheng

于 2018年3月22日 GMT+08:00 上午1:13:42, "Jernej Škrabec"

Post by Jernej Å krabec
Hi all,
Dne sreda, 21. marec 2018 ob 03:18:13 CET je Icenowy Zheng

于 2018年3月21日 GMT+08:00 上午2:46:46, Maxime Ripard

Post by Icenowy Zheng
All the sub-blocks of Allwinner A64 DE2 needs the SRAM C on A64

SoC

to

Post by Icenowy Zheng
be claimed, otherwise the whole DE2 space is inaccessible.
Add a device tree binding of the DE2 part as a sub-bus.

Where did you get the info that it was a bus?

There's no direct evidence, just some guess.
The DE2 is a whole part that is just allocated a memory
space at the user manual, and the SRAM controls the
access to all modules in the DE2.
So it might be a bus.
Implement it as a bus is a clear representation on A64.

Since there is already syscon for same mmio region, we migh as well

use

Post by Jernej Å krabec
it
when loading ccu-sun8i-de2 driver on A64.
Other options, like SRAM driver or bus driver, might better

represent

Post by Jernej Å krabec
HW, but

I think the device tree should properly represent the HW,
it's a basic requirment.

Post by Jernej Å krabec
then we would have two DT nodes covering same mmio region, which I think is
not really acceptable.

It's acceptable, and DE2 is not the only user of SRAM controller so

far.
No, it's not acceptable. Don't create overlapping mmio regions in DT.

Then should the SRAM controller driver be configured to take the syscon?

Post by Icenowy Zheng

VE will also need a SRAM region to be claimed.

Post by Jernej Å krabec
Any suggestions?
BTW, H6 has same design in this regard.
Best regards,
Jernej

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[Icenowy Zheng]

The "Display Engine 2.0" (usually called DE2) on the Allwinner A64 SoC
is different from the ones on other Allwinner SoCs. It requires a SRAM
region to be claimed, otherwise all DE2 subblocks won't be accessible.

Add a bus driver for the Allwinner A64 DE2 part which claims the SRAM
region when probing.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
drivers/bus/Kconfig | 10 ++++++++++
drivers/bus/Makefile | 1 +
drivers/bus/sun50i-de2.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 60 insertions(+)
create mode 100644 drivers/bus/sun50i-de2.c

diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index ff70850031c5..cc8e4b4b6b59 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -95,6 +95,16 @@ config SIMPLE_PM_BUS
Controller (BSC, sometimes called "LBSC within Bus Bridge", or
"External Bus Interface") as found on several Renesas ARM SoCs.

+config SUN50I_DE2_BUS
+ bool "Allwinner A64 DE2 Bus Driver"
+ default ARM64
+ depends on ARCH_SUNXI
+ select SUNXI_SRAM
+ help
+ Say y here to enable support for Allwinner A64 DE2 bus driver. It's
+ mostly transparent, but a SRAM region needs to be claimed in the SRAM
+ controller to make the all blocks in the DE2 part accessible.
+
config SUNXI_RSB
tristate "Allwinner sunXi Reduced Serial Bus Driver"
default MACH_SUN8I || MACH_SUN9I || ARM64
diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile
index 3d473b8adeac..746ff0cebe10 100644
--- a/drivers/bus/Makefile
+++ b/drivers/bus/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o

obj-$(CONFIG_OMAP_OCP2SCP) += omap-ocp2scp.o
obj-$(CONFIG_QCOM_EBI2) += qcom-ebi2.o
+obj-$(CONFIG_SUN50I_DE2_BUS) += sun50i-de2.o
obj-$(CONFIG_SUNXI_RSB) += sunxi-rsb.o
obj-$(CONFIG_SIMPLE_PM_BUS) += simple-pm-bus.o
obj-$(CONFIG_TEGRA_ACONNECT) += tegra-aconnect.o
diff --git a/drivers/bus/sun50i-de2.c b/drivers/bus/sun50i-de2.c
new file mode 100644
index 000000000000..836828ef96d5
--- /dev/null
+++ b/drivers/bus/sun50i-de2.c
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Allwinner A64 Display Engine 2.0 Bus Driver
+ *
+ * Copyright (C) 2018 Icenowy Zheng <***@aosc.io>
+ */
+
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/soc/sunxi/sunxi_sram.h>
+
+static int sun50i_de2_bus_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ int ret;
+
+ ret = sunxi_sram_claim(&pdev->dev);
+ if (ret) {
+ dev_err(&pdev->dev, "Error couldn't map SRAM to device\n");
+ return ret;
+ }
+
+ if (np)
+ of_platform_populate(np, NULL, NULL, &pdev->dev);
+
+ return 0;
+}
+
+static int sun50i_de2_bus_remove(struct platform_device *pdev)
+{
+ sunxi_sram_release(&pdev->dev);
+ return 0;
+}
+
+static const struct of_device_id sun50i_de2_bus_of_match[] = {
+ { .compatible = "allwinner,sun50i-a64-de2", },
+ { /* sentinel */ }
+};
+
+static struct platform_driver sun50i_de2_bus_driver = {
+ .probe = sun50i_de2_bus_probe,
+ .remove = sun50i_de2_bus_remove,
+ .driver = {
+ .name = "sun50i-de2-bus",
+ .of_match_table = sun50i_de2_bus_of_match,
+ },
+};
+
+builtin_platform_driver(sun50i_de2_bus_driver);

[Chen-Yu Tsai]

Post by Icenowy Zheng
The "Display Engine 2.0" (usually called DE2) on the Allwinner A64 SoC
is different from the ones on other Allwinner SoCs. It requires a SRAM
region to be claimed, otherwise all DE2 subblocks won't be accessible.
Add a bus driver for the Allwinner A64 DE2 part which claims the SRAM
region when probing.

Along with this bus driver, we also need
drivers/gpu/drm/sun4i/sun4i_drv.c which can usually drive the
pipelines like mixer0 and 1 are the cases for A64?

I imagine that's the next part to be sent out, after the hardware
representation in the device tree has been decided on.

ChenYu

[Icenowy Zheng]

As claiming Allwinner A64 SRAM C is a prerequisite for all sub-blocks of
the A64 DE2, not only the CCU sub-block, a bus driver is then written for
enabling the access to the whole DE2 part by claiming the SRAM.

In this situation, the A64 compatible string will be just added with no
other requirments, as they're processed by the parent bus driver.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index 468d1abaf0ee..8df7cd93453e 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -292,13 +292,10 @@ static const struct of_device_id sunxi_de2_clk_ids[] = {
.compatible = "allwinner,sun50i-h5-de2-clk",
.data = &sun50i_a64_de2_clk_desc,
},
- /*
- * The Allwinner A64 SoC needs some bit to be poke in syscon to make
- * DE2 really working.
- * So there's currently no A64 compatible here.
- * H5 shares the same reset line with A64, so here H5 is using the
- * clock description of A64.
- */
+ {
+ .compatible = "allwinner,sun50i-a64-de2-clk",
+ .data = &sun50i_a64_de2_clk_desc,
+ },
{ }
};

[Icenowy Zheng]

As we have all necessary parts to enable the DE2 CCU on the Allwinner
A64 SoC, add the needed device tree nodes, including the SRAM controller
node, SRAM C node, DE2 bus node and DE2 CCU node.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 42 +++++++++++++++++++++++++++
1 file changed, 42 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1b6dc31e7d91..1f92015503ea 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -148,6 +148,48 @@
#size-cells = <1>;
ranges;

+ ***@1000000 {
+ compatible = "allwinner,sun50i-a64-de2";
+ reg = <0x1000000 0x400000>;
+ allwinner,sram = <&de2_sram 1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x1000000 0x400000>;
+
+ display_clocks: ***@0 {
+ compatible = "allwinner,sun50i-a64-de2-clk";
+ reg = <0x0 0x100000>;
+ clocks = <&ccu CLK_DE>,
+ <&ccu CLK_BUS_DE>;
+ clock-names = "mod",
+ "bus";
+ resets = <&ccu RST_BUS_DE>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+ };
+
+ sram-***@1c00000 {
+ compatible = "allwinner,sun50i-a64-sram-controller";
+ reg = <0x01c00000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_c: ***@18000 {
+ compatible = "mmio-sram";
+ reg = <0x00018000 0x28000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00018000 0x28000>;
+
+ de2_sram: sram-***@0 {
+ compatible = "allwinner,sun50i-a64-sram-c";
+ reg = <0x0000 0x28000>;
+ };
+ };
+ };
+
syscon: ***@1c00000 {
compatible = "allwinner,sun50i-a64-system-controller",
"syscon";

[Icenowy Zheng]

The A64 SoC features two display pipelines, one has a LCD output, the
other has a HDMI output.

Add support for simplefb for these pipelines on A64 SoC.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1f92015503ea..7767d0761b2e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -42,9 +42,11 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/

+#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun50i-a64-ccu.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>

/ {
@@ -52,6 +54,30 @@
#address-cells = <1>;
#size-cells = <1>;

+ chosen {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ simplefb_lcd: framebuffer-lcd {
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
+ allwinner,pipeline = "mixer0-lcd0";
+ clocks = <&display_clocks CLK_MIXER0>,
+ <&ccu CLK_TCON0>;
+ status = "disabled";
+ };
+
+ simplefb_hdmi: framebuffer-hdmi {
+ compatible = "allwinner,simple-framebuffer",
+ "simple-framebuffer";
+ allwinner,pipeline = "mixer1-lcd1-hdmi";
+ clocks = <&display_clocks CLK_MIXER1>,
+ <&ccu CLK_TCON1>, <&ccu CLK_HDMI>;
+ status = "disabled";
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;

[Icenowy Zheng]

On usual A64 board design the power of HDMI controller is connected to
DLDO1 of the AXP803 PMIC. If this regulator is shut down, the HDMI
output will be blank. Therefore the simplefb driver should keep this
regulator on.

Add the regulator to all currently available A64 boards' simplefb_hdmi
device node.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 4 ++++
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 4 ++++
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts | 4 ++++
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 4 ++++
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 4 ++++
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 4 ++++
6 files changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 2250dec9974c..2fd343512d41 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -282,6 +282,10 @@
regulator-name = "vcc-rtc";
};

+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index e2dce48fa29a..98dbff19f5cc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -195,6 +195,10 @@
regulator-name = "vcc-rtc";
};

+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 3b3081b10ecb..3f531393eaee 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -214,6 +214,10 @@
regulator-name = "vcc-rtc";
};

+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index bf42690a3361..1221764f5719 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -191,6 +191,10 @@
regulator-name = "vcc-rtc";
};

+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index a75825798a71..1b9b92e541d2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -229,6 +229,10 @@
regulator-name = "vcc-rtc";
};

+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
/* On Euler connector */
&spdif {
status = "disabled";
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index abe179de35d7..c21f2331add6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -134,6 +134,10 @@
regulator-name = "vcc-wifi";
};

+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;