Discussion:
[PATCH 0/3] Allwinner V3s audio codec device tree changes
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Icenowy Zheng
2018-02-02 14:01:50 UTC
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Here's the Allwinner V3s audio codec device tree changes, which used to
be blocked by the DMA engine code.

The first patch adds the DMA engine device tree node, and the second
adds the codec nodes (digital and analog).

The thrid patch is for Lichee Pi Zero with Dock board to enable the
audio jack and on-board mic.

Icenowy Zheng (3):
ARM: dts: sun8i: add DMA engine in V3s DTSI
ARM: dts: sun8i: add audio codec support into V3s DTSI
ARM: sun8i: v3s: enable audio on Lichee Pi Zero Dock board

arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +++++++
arch/arm/boot/dts/sun8i-v3s.dtsi | 28 ++++++++++++++++++++++
2 files changed, 37 insertions(+)
--
2.15.1
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Icenowy Zheng
2018-02-02 14:01:51 UTC
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Allwinner V3s SoC features a DMA engine.

Add it in the DTSI file.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 443b083c6adc..20edebd983f0 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -178,6 +178,15 @@
};


+ dma: dma-***@01c02000 {
+ compatible = "allwinner,sun8i-v3s-dma";
+ reg = <0x01c02000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_DMA>;
+ resets = <&ccu RST_BUS_DMA>;
+ #dma-cells = <1>;
+ };
+
mmc0: ***@1c0f000 {
compatible = "allwinner,sun7i-a20-mmc";
reg = <0x01c0f000 0x1000>;
--
2.15.1
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Icenowy Zheng
2018-02-02 14:01:52 UTC
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Allwinner V3s SoC features an internal audio codec like the one in H3,
and a analog codec like the one in H3/A23 (but much simpler).

Add them in the DTSI file.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 20edebd983f0..f6c534efaef9 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -354,6 +354,25 @@
status = "disabled";
};

+ codec: ***@01c22c00 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-v3s-codec";
+ reg = <0x01c22c00 0x400>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_BUS_CODEC>;
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ allwinner,codec-analog-controls = <&codec_analog>;
+ status = "disabled";
+ };
+
+ codec_analog: codec-***@01c23000 {
+ compatible = "allwinner,sun8i-v3s-codec-analog";
+ reg = <0x01c23000 0x4>;
+ };
+
uart0: ***@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.15.1
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Icenowy Zheng
2018-02-06 02:43:48 UTC
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Post by Icenowy Zheng
Post by Icenowy Zheng
Allwinner V3s SoC features an internal audio codec like the one in
H3,
Post by Icenowy Zheng
and a analog codec like the one in H3/A23 (but much simpler).
Add them in the DTSI file.
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi
b/arch/arm/boot/dts/sun8i-v3s.dtsi
Post by Icenowy Zheng
index 20edebd983f0..f6c534efaef9 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -354,6 +354,25 @@
status = "disabled";
};
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-v3s-codec";
+ reg = <0x01c22c00 0x400>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_BUS_CODEC>;
+ dmas = <&dma 15>, <&dma 15>;
+ dma-names = "rx", "tx";
+ allwinner,codec-analog-controls = <&codec_analog>;
+ status = "disabled";
+ };
+
+ compatible = "allwinner,sun8i-v3s-codec-analog";
+ reg = <0x01c23000 0x4>;
This should be the whole size of the memory region.
OK. (Although on the datasheet digital part and analog
part is listed as one region.)
Post by Icenowy Zheng
Maxime
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Icenowy Zheng
2018-02-02 14:01:53 UTC
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The Lichee Pi Zero Dock board has an audio jack and an onboard MIC.

Enable them.

Signed-off-by: Icenowy Zheng <***@aosc.io>
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
index d1311098ea45..80f477738668 100644
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
@@ -55,6 +55,15 @@
};
};

+&codec {
+ allwinner,audio-routing =
+ "Headphone", "HP",
+ "Headphone", "HPCOM",
+ "MIC1", "Mic",
+ "Mic", "HBIAS";
+ status = "okay";
+};
+
&mmc1 {
broken-cd;
bus-width = <4>;
--
2.15.1
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